At 09:59 AM 1/14/03 -0500, Robert E. Griffith wrote: >Thanks everyone for the advice. Does anyone no why there are no SPI RAM >chips? Is it lack of demand or is there a technical reason than makes RAM >unfit for a serial chip (I can't imagine that, but then again IDKE:) > >Parallel RAM: >If I use a parallel RAM I wonder if it would be worth it to include an >address latch chip, so that I could stick with the 28 pin 18F252 or if I >should switch to a 40 pin 18F452 and use all the additional I/O as address >lines? Do you need true random addressability or just a lot of sequentially addressed storage? If it is the latter, how about using a counter to generate the address signals. All you need then is clk and reset for the counter. dwayne -- Dwayne Reid Trinity Electronics Systems Ltd Edmonton, AB, CANADA (780) 489-3199 voice (780) 487-6397 fax Celebrating 18 years of Engineering Innovation (1984 - 2002) .-. .-. .-. .-. .-. .-. .-. .-. .-. .- `-' `-' `-' `-' `-' `-' `-' `-' `-' Do NOT send unsolicited commercial email to this email address. This message neither grants consent to receive unsolicited commercial email nor is intended to solicit commercial email. -- http://www.piclist.com hint: The PICList is archived three different ways. See http://www.piclist.com/#archives for details.