> You are currently only allocating up to $1E by my count, so you
> should still be ok, however, you should be mindful of how you are
> allocating your resources

FSR is set to run between 08 and 1E and is reset on every loop
iteration. Which in some cases is over 1000 times before the
program stops for the mystery reason. This seems to be safely
within the bank's RAM limits

For other programs it may be necessary to look at how RAM is
managed, but I feel for the limited RAM this program needs what
is in place is OK. With all due respect to your opinion (and that's
not a politician's "due respect" - appreciate the help you and
Stanston are offering)

> I notice that you're writing a 1 to RA.5, with the comment "RTCC
> pulled low...". RTCC is a dedicated input pin, and has nothing to
> do with port A, so setting this does nothing

As noted in a previous post, sheer desperation to try anything

> The device directives need to specifiy the OSC gain, ie. LP1,
> LP2, XT1, XT2, HS1, HS2 or HS3. The SX datasheet explains
> what these are for. For 50MHz operation, you will require HS2
> or HS3 to operate reliably

It's not shown in the circuit diagram but the SXs are running on an
external 50MHz oscillator module. I believe that OSC settings don't
matter as there's no drive required. If there was a 50MHz crystal
on OSC1 OSC2 instead I'd have to give an OSCXT5 directive

The 50_000_000 directive is for debugging

> I hope this helps. While I don't see any specific failures (without
> debugging the code)

Well, when I find out what's going, that'll make two of us

--
http://www.piclist.com hint: The list server can filter out subtopics
(like ads or off topics) for you. See http://www.piclist.com/#topics