> What I meant
> about the 16f series and access bank was that as long as a SFR is mapped
> to the access bank, I can use it regardless of the value of the BSR.

The PIC16 has no access bank.  On the PIC18, all special function registers
are accessible via the access bank.  The address range F80h - FFFh is
specifically reserved for SFRs, which is also the second half of the access
bank.

> And, thus I can set TRIS values without having to bank select, which is
> what I would have to do in a 16f chip. Correct?

Yes.  Any SFR access on a PIC18 can be done via the access bank.

> Also, when defining data RAM (equ or cblock), how do I define the
> registers in BSR=0x01? Do I have to offset them and give them a higher
> value (.128+), or do they map to .1+?

You don't define registers as belonging to a particular BSR setting, but you
can define them in the address range that can be directly accessed by a
particular BSR setting.  If you want to be able to access a register with
BSR=1, then you need to make sure its address is 100h - 1FFh.


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