Ok, I reread my original post, and it seems that lack of sleep was making it hard for me to articulate my thoughts last night. What I meant about the 16f series and access bank was that as long as a SFR is mapped to the access bank, I can use it regardless of the value of the BSR. And, thus I can set TRIS values without having to bank select, which is what I would have to do in a 16f chip. Correct? Also, when defining data RAM (equ or cblock), how do I define the registers in BSR=0x01? Do I have to offset them and give them a higher value (.128+), or do they map to .1+? Thanks, Josh -- A common mistake that people make when trying to design something completely foolproof is to underestimate the ingenuity of complete fools. -Douglas Adams Olin Lathrop wrote: > > one > > thing I am a little hazy on is still the access bank. I know the first > > 128 bytes are GPR, and the second 128 are SFR. Does this mean that I can > > set the SFRs directly, without having to bank switch, > > Yes. The access bank can always be directly accessed without regard to > BSR. > > > as in the 16f? > > Huh? The PIC16 has no "access bank" mechanism. > > > Also, what happens when I set the BSR to 0x01? > > That's what I recommend you do until you know enough and have an unusual > situation where that's not good enough. BSR set to 1 selects 100h - 1FFh > as the 8 bit data address space that can be accessed directly. The access > bank and registers accessed thru BSR are essentially two independent > address spaces. The access bank always allows direct access to 0 - 7Fh > and F80h - FFFh. With BSR = 1 you can also access 100h - 1FFh directly in > any instruction without needing to mess with bank switching. -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email listserv@mitvma.mit.edu with SET PICList DIGEST in the body