This is a clock for a processor implemented in an fpga. The division
comes about because there is a uart implemented as well inside the
processor to avoid framing errors. So, yes, it is a square wave. -Vic

-----Original Message-----
From: Robert Rolf <Robert.Rolf@UALBERTA.CA>
To: PICLIST@MITVMA.MIT.EDU
Date: Fri, 22 Nov 2002 11:39:21 -0700
Subject: Re: [OT]:Need to divide Frequency by 163.

> Does it need to be a square wave? If single pulses are OK, use a
> reloadable
> down counter that reloads 162 on every underflow.
>
> Vic Lopez wrote:
> >
> > Hello,
> >      I am in need to divide a 12.5 Mhz clock by 163. How can this
> be
> > done with a counter? I know that if this division were a power of
> two,
> > then it would be very straight forward, but this is not my case at
> all.
> > Any pointers will be greatly appreciated. -Vic
> >
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