Royce Simmons:
>> Does anyone have a code fragment showing how to write a byte to the
>> EEPROM
>> Also is the "reqiured sequence" needed for each write?
Martin Buehler:
> but i had troubles when writing or reading several addresses at a time.
> when adding a delay of 40ms between two accesses to the eeprom, it
> worked.

Yes, the required sequence is needed for each write.
Re Martin's troubles:
After an eeprom write, there is a wait time until the eeprom can be
written to or read from again (the eeprom write cycle time).  There is no
such wait after a read - you can read again immediately.  I've only used
the F87x's - the write cycle time is 8 ms max.  The pic will also generate
an interrupt when the write is complete if you prefer that route.  Don't
know about the F628.
If the OP is looking for a 'C' code fragment, here's what I use (for the
F87x and in CCS C):
Note:  int's are 8 bits in CCS C

// init INTERNAL_EEPROM_AVAILABLE = 1 and only call the read or write
// functions when it is set

// or, if you don't want to use interrupts, just wait 8ms after every
// write (no waiting is required after a read - but a read has to wait for
// a write to be done)

#byte EEDATA = 0xfa8
#byte EEADR  = 0xfa9
#byte EECON1 = 0xfa6
#byte EECON2 = 0xfa7
#define EEPGD 7
#define WREN  2
#define WR 1
#define RD 0

#byte INTCON = 0xff2
#define GIE 7

unsigned int  INTERNAL_EEPROM_AVAILABLE;  // global flag

void WRITE_INTERNAL_EEPROM(unsigned int Address, unsigned int Data)
{
  // clear flag - will be set in isr when write cycle complete
  INTERNAL_EEPROM_AVAILABLE = 0;
  EEADR = Address;
  EEDATA = Data;
  bit_clear(EECON1, EEPGD);  // point to data
  bit_set(EECON1, WREN);     // enable writes
  bit_clear(INTCON, GIE);    // disable interrupts
  EECON2 = 0x55;             // required sequence for writing
  EECON2 = 0xAA;
  // start write cycle (WREN has to be set first, and in a separate
  // instruction)
  bit_set(EECON1, WR);
  bit_clear(EECON1, WREN);   // disable writes until next call
  bit_set(INTCON, GIE);      // interrupts back on - an interrupt will be
                             // generated when write cycle is complete
}

unsigned int READ_INTERNAL_EEPROM(unsigned int Address)
{
  EEADR = Address;
  bit_clear(EECON1, EEPGD);  // point to data
  bit_set(EECON1, RD);       // initiate read - data is available in
  return EEDATA;             // EEDATA buffer next instruction
}

#int_eeprom
void INTERNAL_EEPROM_WRITE_COMPLETE(void)
{
  INTERNAL_EEPROM_AVAILABLE = 1;
}

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