From PICLIST@MITVMA.MIT.EDU Fri Nov 15 16:19:58 2002 Received: from cherry.ease.lsoft.com [209.119.0.109] by dpmail10.doteasy.com with ESMTP (SMTPD32-7.13) id AF2E145E00B8; Fri, 15 Nov 2002 16:19:58 -0800 Received: from PEAR.EASE.LSOFT.COM (209.119.0.19) by cherry.ease.lsoft.com (LSMTP for Digital Unix v1.1b) with SMTP id <12.007DE177@cherry.ease.lsoft.com>; Fri, 15 Nov 2002 19:05:48 -0500 Received: from MITVMA.MIT.EDU by MITVMA.MIT.EDU (LISTSERV-TCP/IP release 1.8d) with spool id 1330 for PICLIST@MITVMA.MIT.EDU; Fri, 15 Nov 2002 19:05:32 -0500 Received: from MITVMA (NJE origin SMTP@MITVMA) by MITVMA.MIT.EDU (LMail V1.2d/1.8d) with BSMTP id 4771; Fri, 15 Nov 2002 19:03:41 -0500 Received: from *unknown [209.66.107.17] by mitvma.mit.edu (IBM VM SMTP Level 320) via TCP with SMTP ; Fri, 15 Nov 2002 19:03:40 EST X-Warning: mitvma.mit.edu: Host *unknown claimed to be brouhaha.com Received: (qmail 5327 invoked by uid 1032); 16 Nov 2002 00:03:40 -0000 Received: from localhost (sendmail-bs@127.0.0.1) by localhost with SMTP; 16 Nov 2002 00:03:40 -0000 X-X-Sender: sdattalo@ruckus.brouhaha.com MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Message-ID: Date: Fri, 15 Nov 2002 16:03:40 -0800 Reply-To: pic microcontroller discussion list Sender: pic microcontroller discussion list From: Scott Dattalo Subject: Re: [PIC]: Many channels of PWM To: PICLIST@MITVMA.MIT.EDU In-Reply-To: <3DD59B00.C1DC6E7D@3mtmp.com> X-RCPT-TO: Status: R X-UIDL: 277600754 X-Evolution-Source: pop://mailinglist%40farcite.net@mail.farcite.net/ X-Evolution: 000007b5-0000 On Fri, 15 Nov 2002, Josh Koffman wrote: > Well, it's controlling lights, so it needs to be quick enough so there > is no interference, and no flicker. I am not looking for an analog > output though, I am looking for actual PWM. I don't think this idea > would work...am I wrong? Well, as Olin suggested, the PWM routine can be placed in a Timer interrupt routine. You could run http://www.dattalo.com/technical/software/pic/pwm8.asm For 23 cycles / 8 PWM's. Or 46 cycles for 16 PWMs. For the last two PWMs you could shrink the routine to just this: CLRW ;Build the bit mask for turning ;off the PWM outputs. Assume that ;all of the outputs will be turned ;off. ; DECFSZ pwm0,F ;If the first counter has not reached 0 IORLW 00000001b ;then we don't want to turn it off. ; DECFSZ pwm1,F ;Same for the second one IORLW 00000010b ; ANDWF pwm_state,W ; Clear all of those pwm outputs ;that have reached zero. ; XORLW 00000011b ;Toggle the current state. INCFSZ rising_edge,F ;If the rising edge counter has not XORLW 00000011b ;rolled over then toggle them again. ;Double toggle == no effect. However, ;if the rising edge counter does roll ;over then a single toggle will turn ;the pwm bits on, unless of course the ;pwm counter has just rolled over too. ; MOVWF pwm_state ;Save the state MOVWF PWM_PORT ;update the outputs That'd be 58 cycles for 18 outputs. If TMR0 is the interrupt source and you don't select the prescaler, then you'd have ~75% of the CPU time available for other things. Those "other things" would be updating all those PWMs! (BTW, there's a way to save a few cycles by combining the checks for "rising_edge"). Scott -- http://www.piclist.com hint: The PICList is archived three different ways. See http://www.piclist.com/#archives for details.