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> Let me rephrase. Yes, it would have worked using the linker, but it
would
> have involved a lot of fussing with the .LKR file.

I don't see anything in your description that would require this.  I've
attached my standard linker control file for the 16F876, which creates a
separate section for each page.  By the way, all my linker control files
are available in the PIC development tools download at
http://www.embedinc.com/pic/dload.htm.

> Sometimes several code
> pieces were carefully packed into single 256-word chunks (so that I
could
> run state machines by simply copying state values toPCL). Other chunks
just
> had to fit within the same 2K page as the state machines they supported.
In
> some cases I had to ensure that several distinct 256-word chunks, each
> containing the code for one or more state machines all were within the
same
> 2K page. I was able to ensure that everything fit where it was supposed
to
> by using appropriate IF checks in the asm code.

;   This module contains blocks of instructions that need
;   to be in the same 256-word block, and all these blocks
;   need to be on the same code page.
;
bstart   set  h'0800'     ;start the blocks here (start of page 1)
;
;   Block 1
;
.block1  code bstart
         <code for block 1>
  if ($ - bstart) > 256
         error  "Block 1 larger than 256 words"
    endif
bstart   set  bstart + 256 ;make start address for next block
;
;   Block 2
;
.block2  code bstart
         .
         .
         .

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//   Linker control file for the PIC 16F876 processor.
//
CODEPAGE NAME=3Dconfig START=3D0x2007  END=3D0x2007 //special processor =
config word

CODEPAGE NAME=3Dcode0      START=3D0  END=3D0x7FF //code page 0
CODEPAGE NAME=3Dcode1  START=3D0x800  END=3D0xFFF //code page 1
CODEPAGE NAME=3Dcode2 START=3D0x1000 END=3D0x17FF //code page 2
CODEPAGE NAME=3Dcode3 START=3D0x1800 END=3D0x1FFF //code page 3

DATABANK NAME=3Dbank0  START=3D0x20  END=3D0x6F //register bank 0
DATABANK NAME=3Dbank1  START=3D0xA0  END=3D0xEF //register bank 1
DATABANK NAME=3Dbank2 START=3D0x110 END=3D0x16F //register bank 2
DATABANK NAME=3Dbank3 START=3D0x190 END=3D0x1EF //register bank 3

SHAREBANK NAME=3Dglobalram  START=3D0x70  END=3D0x7F PROTECTED //global =
regs, bank 0
SHAREBANK NAME=3Dglobalram  START=3D0xF0  END=3D0xFF PROTECTED //global =
regs, bank 1
SHAREBANK NAME=3Dglobalram START=3D0x170 END=3D0x17F PROTECTED //global =
regs, bank 2
SHAREBANK NAME=3Dglobalram START=3D0x1F0 END=3D0x1FF PROTECTED //global =
regs, bank 3

SECTION NAME=3D.udata_shr RAM=3Dglobalram //global memory mapped to all =
register banks
SECTION NAME=3D.BANK0 RAM=3Dbank0 //for registers explicitly in bank 0
SECTION NAME=3D.BANK1 RAM=3Dbank1 //for registers explicitly in bank 1
SECTION NAME=3D.BANK2 RAM=3Dbank2 //for registers explicitly in bank 2
SECTION NAME=3D.BANK3 RAM=3Dbank3 //for registers explicitly in bank 3

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(978) 742-9014, http://www.embedinc.com

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