> Well, based on what you and Roman have input here the following would > work for 240VAC (assuming shitty Australia and New Zealand power); > > * Two resistors in series - say 3~4M each > * 5.1V Zener from Pin to GND - only small wattage, I assume is OK > * up to say 100nF Metalised cap (rated at 400V) strapped across Zener > > OR > > * a pair of Schottky diodes on input pin > > Yes? Yes-ish, for positive input. Add second zener to supply (suitable polarity) for negative input. Even 5v1 violates spec but can be thought about. (ie it would work :-) ). > How do you feel about sinking the gate current to a PIC pin through a > single resistor - if maintained at around 5mA? I feel very positive about it. I'm absolutely CERTAIN that it would cause undefined and undefinable operational problems in some cases. As a PROTECTIVE system where the cpu was meant to live but not be guaranteeed to be able to chew gum during OR AFTER mains application it's fine. CPU would need to be powered down (to under 0.1V on Vdd*) and restarted after the event to be certain operation would be OK. Resistor would need to be AT LEAST 2w rated at 5 mA. Resistor would need to be X rated (a la caps spec) - most small resistors do NOT have suitable voltage ratings for off mains use, regardless of power dissipated. Transients would need to be considered separately. * Based on experience. Once latchup occurs it can remain until Vdd falls to a very low level. My experience is that < 0.1V on Vdd removes non-destructive latchup but voltages above this may not. In many systems Vdd falls to under about 0.5V rapidly due to junction conduction but then falls much more slowly due to resistive only loads. The latchup state MAY remain for tens of seconds. Antibrownout and reset will not cure this. Russell McMahon -- http://www.piclist.com hint: To leave the PICList mailto:piclist-unsubscribe-request@mitvma.mit.edu