What's the issue with covering/not covering vias?  Is it just whether you
want to use the via as a test point or not?  Why would Eagle make it so that
there is a fixed size to transition from covered to not covered?

--BobG

-----Original Message-----
From: pic microcontroller discussion list [mailto:PICLIST@MITVMA.MIT.EDU]On
Behalf Of Roman Black
Sent: Tuesday, November 05, 2002 7:40 AM
To: PICLIST@MITVMA.MIT.EDU
Subject: Re: [EE]: EAGLE

Olin Lathrop wrote:
>
> > Thanks Olin, I checked options>set>DRC but
> > still couldn't find it. Maybe my version of
> > Eagle is too old??
>
> I am using the current version of Eagle (version 4).
>
> I just fired up Eagle and checked.  Go to a board layout and run TOOLS >
> DRC.  This brings up an applet window with 9 tabs.  The second tab from
the
> right is labeled MASKS.  In it is a parameter called LIMIT.  This can be
> used to adjust the maximum size of vias that will be covered by solder
mask.


Thank you Olin and David, I checked in Eagle
3.55 and it took a while to find, it's under
options->set->mask->set_stop_limit
which is not intuitive at all, my major gripe
with Eagle. It's a PITA to use unless I suppose
you've been using it since the text command days
and know what all the obscure commands mean.

Vias are covered now, thank you everyone. :o)
-Roman

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