Hi,
Eelco Deutekom wrote:

>Hello,
>
>Who has had some dsPIC handson experience and is willing to
>tell some thing about it?
>

Well if you refer to real chip's then no, as I understand it they're
only available as samples to really big customers and for their own=20
tests.

But in the simulator I've had some tinkering, particulary at this years
masters.
I attended some workshops with programmming both in asm and in c. As far
as I can tell
it's a quite nice chip. The most compelling 'feature' is the hybrid
microcontroller/dsp
functionality. The worst is it's 'only' 16 bits, it really should have
been atleast 24 bits.
One can argue that going from an 8 bit architecture to an 16 bit is good
enough,
in some ways it is, but to be future proof I think not. Looking at the
time it takes
to get the chip done i think it will take ages until they extend it to
24 or 32 bits.
And it that time 'others' would have catched up. And that's presuming
they will extend it
to more than 16 bits, that we know nothing about.

Anyway, I'm not complaining but it just strikes me as an poor jugdement
on their side.

To get back to coding, look at these neat instructions:


MAC W4*W5,A,[W4]+=3D2,W4,[W10]-=3D6,W5

Yes that is *one* instruction ! anyone care to guess what it does ? :)
or perhaps this one, on the lighter side, is easier:

MPY W4*W5,A,[W8],W4,[W10],W5

This one will, multiply the 16 bit operands in registers W4 and W5 with
each other and place
the 32 bit result in the 40 bit accumulator A, it will also in the
*same* instruction cycle,
prefetch the 16 bit value from indirect adress pointed to by [W8] (like
FSRx) and place it in register W4,
and at the same time do likewise with [W10] and W5. Neat uh ?

It has sixteen 16 bit working registers(some has 'dedicated' function),
two 40bit accumulators,
repeat, do loop counters, do start/end adresses. 40 bit barrel shifter (
shift x bits in one instruction
cycle ), 16 bit divide 'support' (18 instruction cycles), etc etc. many
new neat things from DSP world
but in an pic package.


/Tony

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