Sounds like the phase-gain characteristics of the active element comprising the on-board osc have changed ... do you have a means to test this? ... simple feedback resistor, inject a signal and observe the 'phase-gain relationship' at several different frequencies ... If the placement of the inductor was across the 'inverter' that comprises the active osc device, you have effectively shunted the DC (and low freq. gain) gain of that stage ... RF Jim ----- Original Message ----- From: "Russell McMahon" To: Sent: Wednesday, October 23, 2002 6:18 PM Subject: Re: [EE]: Winding inductor for 2 trans. LED blinker > > I'm curious - what brand/manufacturer of crystal? > > > > Have you had an opportunity to 'characterize' the crystal > > (measure it's parameters) on an xtal test set? > > > > (Perhaps a lower-than-average-Q 'rock' in conjuction > > with an oscillator whose gain is in the low end of the > > acceptable spectrum is the overall problem ...) > > A change in crystal characteristics was one of the things high on my list of > suspect candidates. > Unfortunately, it was as I said > > > an otherwise intractable problem. > ie I had tried changing everything else in sight (and a few things not in > sight) including the crystal. The change occurred with processor date code > change. ALL devices prior to this date code work 100%. About 50% with new > date code fail. Manufacturers (in Taiwan) assure me that the crystal type, > manufacturer etc has not been changed. I was sent 11 sample boards with the > fault. Changing the crystal to ones available locally (in New Zealand) does > not alter result. > > The problem APPEARS to be related to the processors sensitivity to latch up > during power on if certain voltages are present on pins when Vdd is applied > with certain (or uncertain :-) ) rise times. Suffice it to say that > everything I am doing is inside datasheet spec but processor does not always > start (whic is ouitside datasheet spec :-) ). > > Even clamping all (sensible) pins to Vdd with Schottky diodes does not > prevent maloperation. > Once in the errant mode the oscillator does not start and the processor will > not return to normal until Vdd drops to below about 0.1v. This can take some > 10's of seconfds in a normal circuit as once silicon junctions stop being > biased on current draw is due almost only to purely passive loads. > > The 22uH made all but one of the samples work OK - the last may have other > problems or be an especially bad example. > > > > Russell McMahon > -- http://www.piclist.com hint: To leave the PICList mailto:piclist-unsubscribe-request@mitvma.mit.edu