This is the config file (.asm) for the 18f452, I don't know if they are
the same but probably they are.  Don't forget to change the last line to
your needs.

; configuration file for PIC 18 series micros
; Author J Rowlatt
; Date 19th March 2002
; To use change linelist p=3D18c452 to reflect the micro being used
; set the config as required see below, then add to project


#define CONFIG1L 0x300000
#define CONFIG1H 0x300001
#define CONFIG2L 0x300002
#define CONFIG2H 0x300003
#define CONFIG3L 0x300004
#define CONFIG3H 0x300005
#define CONFIG4L 0x300006
#define CONFIG4H 0x300007
#define CONFIG5L 0x300008
#define CONFIG5H 0x300009
#define CONFIG6L 0x30000a
#define CONFIG6H 0x30000b
#define CONFIG7L 0x30000c
#define CONFIG7H 0x30000d

#define ENABLE_POWERUP_TIMER 0xfe
#define DISABLE_POWERUP_TIMER 0xff
#define ENABLE_BROWNOUT_DETECT 0xff
#define DISABLE_BROWNOUT_DETECT 0xfd

#define BROWN4_5 0xf3
#define BROWN4_2 0xf7
#define BROWN2_7 0xfb
#define BROWN2_5 0xff

#define CODE_PROTECT_ON 0x00
#define CODE_PROTECT_OFF 0xff

#define OSC_SWITCH_ENABLE 0xdf
#define OSC_SWITCH_DISABLE 0xff

#define RC_OSC_OSC2_RA6 0xff
#define HS_PLL_OSC 0xfe
#define EC_OSC_OSC2_RA6 0xfd
#define EC_OSC_OSC2_DIV4 0xfc
#define RC_OSC 0xfb
#define HS_OSC 0xfa
#define XT_OSC 0xf9
#define LP_OSC 0xf8

#define WDT_ENABLE 0xff
#define WDT_DISABLE 0xfe

#define WDT1 0xf1
#define WDT2 0xf3
#define WDT4 0xf5
#define WDT8 0xf7
#define WDT16 0xf9
#define WDT32 0xfb
#define WDT64 0xfd
#define WDT128 0xff

#define DUMMY 0xff

#define CCP2_RC1 0xff
#define CCP2_RB3 0xfe

#define STACK_OVERFLOW_RESET_ENABLE 0xff
#define STACK_OVERFLOW_RESET_DISABLE 0xfe
#define DISABLE_ISDEBUG 0xff
#define ENABLE_ISDEBUG 0x7f
#define ENABLE_LV_ICSP 0xff
#define DISABLE_LV_ICSP 0xfb

#define CODE_PROTECT_B0 0xfe
#define DISABLE_CODE_PROTECT_B0 0xff
#define CODE_PROTECT_B1 0xfd
#define DISABLE_CODE_PROTECT_B1 0xff
#define CODE_PROTECT_B2 0xfb
#define DISABLE_CODE_PROTECT_B2 0xff
#define CODE_PROTECT_B3 0xf7
#define DISABLE_CODE_PROTECT_B3 0xff

#define BOOT_BLOCK_PROTECT_ENABLE 0xbf
#define BOOT_BLOCK_PROTECT_DISABLE 0xff

#define EEPROM_PROTECT_ENABLE 0x7f
#define EEPROM_PROTECT_DISABLE 0xff

#define ENABLE_TABLE0_READ 0xff
#define DISABLE_TABLE0_READ 0xfe
#define ENABLE_TABLE1_READ 0xff
#define DISABLE_TABLE1_READ 0xfd
#define ENABLE_TABLE2_READ 0xff
#define DISABLE_TABLE2_READ 0xfb
#define ENABLE_TABLE3_READ 0xff
#define DISABLE_TABLE3_READ 0xf7
#define ENABLE_BOOTBLOCK_READ 0xff
#define DISABLE_BOOTBLOCK_READ 0xbf

        list p=3D18f452
        __config CONFIG1L, CODE_PROTECT_OFF
        __config CONFIG1H, HS_PLL_OSC & OSC_SWITCH_DISABLE
        __config CONFIG2L, ENABLE_POWERUP_TIMER & BROWN4_2 &
ENABLE_BROWNOUT_DETECT
        __config CONFIG2H, WDT_DISABLE & WDT128
        __config CONFIG3L, DUMMY
        __config CONFIG3H, DUMMY
        __config CONFIG4L, STACK_OVERFLOW_RESET_ENABLE & DISABLE_ISDEBUG
& DISABLE_LV_ICSP
        __config CONFIG4H, DUMMY
        __config CONFIG6L, DISABLE_CODE_PROTECT_B0 &
DISABLE_CODE_PROTECT_B1 & DISABLE_CODE_PROTECT_B2 &
DISABLE_CODE_PROTECT_B3
        __config CONFIG6H, EEPROM_PROTECT_DISABLE &
BOOT_BLOCK_PROTECT_DISABLE=20
        __config CONFIG7L, ENABLE_TABLE0_READ & ENABLE_TABLE1_READ &
ENABLE_TABLE2_READ & ENABLE_TABLE3_READ
        __config CONFIG7H, ENABLE_BOOTBLOCK_READ

        END

=D6mer YALHI
oyalhi@teksan.com.tr
http://www.teksan.com.tr
Tel : +90 212 613 22 00
Fax: +90 212 544 70 35


-----Original Message-----
From: pic microcontroller discussion list
[mailto:PICLIST@MITVMA.MIT.EDU] On Behalf Of Dr Martin Hill
Sent: Friday, September 27, 2002 12:43 AM
To: PICLIST@MITVMA.MIT.EDU
Subject: [PIC]: P18F458.inc file in MPLAB


I'm just starting a project using this processor, and noticed that a lot
of the CONFIG addresses are not in the .inc file.  Just wondered if
anybody else had come across this and has written the relevant parts for
the file.

Thanks

Martin

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