"If one takes a 12C508A  f.ex. and uses internal
    RC then what clock frequency does it run on for
    FCC purposes ?"

Gee, I can see major spurs (spurious) being created
at the 'clock' frequency (what ever f the proc core is
clocked at), determined by whatever the RC combo works
that out to be, and if you *fail* to think that just
because a uP w/o a crystal *has* no oscillator then it
will be the first visit by the FCC in one of their field
enforcement bureau vans with a spectrum analyzer that
points out the errors of your ways ...

If in doubt, "range check it" ...

**Seriously** -

- the PIC with everything on-board has GOT to be the one
of the cleanest uPs on the market. I have a Z80 design
that spews garbage EVERYWHERE - but it's not marketed
or sold so I can get away with it. It creates noticable
'spurs' (carriers) throughout the HF spectrum and even
causes noticable herring bone patters on VHF-Low TV
channels ... the Z80 design uses every peripheral IC in
the Z80 family plus RAM and EPROM IC. The board design
is only two-sided  w/no Ground plane and the traces
are run nearly everywhere!

Ground and power are .1" parallel buses running under
each IC, joining together to the main .1" bus. Bypass
caps are present at each IC.

It is also very noticable *which* routines are running
in the code - there are several "phase-locked loops"
in software that lock onto externally supplied
data (Motorola trunking signals) and so the CPU
is constantly servicing interrupts due to timers
and edge transitions, perfroming timed scanning of
keypad and updating data to LCD display *desides*
doing error det and corr for a rate 1/2 convolutional
data decoder and a block parity checker.


RF Jim

    "Our ability to manufacture fraud has exceeded
     our  ability to detect it."

     - Al Pacino as Viktor Taransky in the movie 'Simone'


----- Original Message -----
From: "Peter L. Peres" <plp@ACTCOM.CO.IL>
To: <PICLIST@MITVMA.MIT.EDU>
Sent: Sunday, August 25, 2002 1:12 PM
Subject: Re: [AVR]: Wondering about the avr...


> On Sun, 25 Aug 2002, Pic Dude wrote:
>
> >Whereas I've never needed to run a pic at max frequency (nothing I
> >do has been that speed critical), I can see this non-div-by-4 clock
> >as being useful for getting the max speed out of a processor while
> >meeting the FCC 1.705Mhz exemption threshold.
>
> By the way what is the status of internal clock ? If one takes a 12C508A
> f.ex. and uses internal RC then what clock frequency does it run on for
> FCC purposes ? none ? In my experience a poorly decoupled switching stage
> using a fet makes much more noise than a PIC in such a configuration.
>
> Peter
>

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