On Sun, 25 Aug 2002, Pic Dude wrote: >Whereas I've never needed to run a pic at max frequency (nothing I >do has been that speed critical), I can see this non-div-by-4 clock >as being useful for getting the max speed out of a processor while >meeting the FCC 1.705Mhz exemption threshold. By the way what is the status of internal clock ? If one takes a 12C508A f.ex. and uses internal RC then what clock frequency does it run on for FCC purposes ? none ? In my experience a poorly decoupled switching stage using a fet makes much more noise than a PIC in such a configuration. Peter -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads