On Sat, 24 Aug 2002 14:25:35 -0700, you wrote: >Mike Harrison wrote: >> >AVR Cons >> >-------- >> High power consumption at 5V >> Non-consistent interrupt response time (can be a problem with timer = ints) > >What causes that? Variable-length instructions.=20 =46or example, if you set up a timer interrupt on a PIC, it occurs with rock-solid regularity. With an AVR there will be jitter - I think up to 3 cycles, as the interrupt latency is longer if the foreground task is executing a longer instruction. As AVR instructions can take 1, 2, 3 or 4 cycles. This will only be an issue in certain types of application, where regular timing off interrupts (e.g. generating external waveforms) is important. Although some PIC instructions take 2 cycles, the pipelining behaviour ensure that interrupt latency from internal-clock-generated interrupts is consistent.=20 .of course the AVR's multiple interrupt vectors and better context-saving is MUCH MUCH nicer than the PIC for handling multiple interrupt sources. >Several years ago, I tried to prototype an application on a 90S1200 in >which I needed to take precisely-timed samples of the output of the = analog >comparator. I could never get this to work right and eventually gave up = on >trying to use the AVR. Which is too bad, because in many other respects = it >was the ideal chip for the job. > >-- Dave Tweed -- http://www.piclist.com hint: To leave the PICList mailto:piclist-unsubscribe-request@mitvma.mit.edu