> If I were designing a processor, there would be the full reset
> conditions that I mentioned, and on top of that, there would be
> prioritized interrupts (probably about 4, 8 or 16 levels), the
> highest of which would be initiated without a question of GIE.  I
> would make several external pins mapable to interrupts (of various
> priorities)/normal I/O.  There would be one full-reset pin.  One that
> basically erased all volatile RAM on the processor.  You can't get
> more of a clean start than that.

Many of these things have been done on various processors, except that I
don't know of any processor that does a deliberate hardware RAM clear on
power up.  If you really want that, you can always clear the RAM in software
immediately after a reset.  The rest of the things you mentioned are an
issue of cost versus features tradeoff.  Small microcontrollers for embedded
applications are very cost sensitive.  In that kind of an environment adding
the features you described would be mostly silly.  Put another way, if I can
get a 16F876 for $4.00, I wouldn't pay $4.10 for the same processor with
these features added, at least not for the vast majority of applications.

> I'll leave that analysis to the professional chip designers.

Yes, please do.


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