--------------------------------------- Whoops, accidentally hit SEND too soon. --------------------------------------- Brendan Moran wrote: > Determine the time it takes for the processor to be garaunteed to > have all its volatile RAM fail. Program a one-shot to that length > of time. Attach an edge triggered one-shot to the processor's > power pins. Then, have the processor trigger the one-shot, which > will force it to power down, and stay off until all its RAM is > gone. Brendan: The time for RAM to fail -- to "forget" its contents -- can be VERY long: Many seconds at room temperature, and much longer at low temperatures. Also... RAM "failure" isn't the same as RAM "clear". RAMs generally power-up in an arbitrary state, so even removing power for a year won't ensure that the RAM would be clear on power-up. > I admit it's a little short of trap doors, and before you sneer at > me, consider the possibilities a bit. No sneering here. I hope you didn't take offense at my earlier comment; none was intended. > If it takes less time for this than the large volume of instruction > cycles to clear all the RAM, then it should be worth it, right? Well, no, not necessarily. Length of time from power application to all RAM clear is rarely a critical factor in a circuit design. -Andy === Andrew Warren -- aiw@cypress.com === Principal Design Engineer === Cypress Semiconductor Corporation === === Opinions expressed above do not === necessarily represent those of === Cypress Semiconductor Corporation -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads