Brendan Moran wrote: > Determine the time it takes for the processor to be garaunteed to > have all its volatile RAM fail. Program a one-shot to that length > of time. Attach an edge triggered one-shot to the processor's > power pins. Then, have the processor trigger the one-shot, which > will force it to power down, and stay off until all its RAM is > gone. > > I admit it's a little short of trap doors, and before you sneer at > me, consider the possibilities a bit. If it takes less time for > this than the large volume of instruction cycles to clear all the > RAM, then it should be worth it, right? Well, no... Not necessarily. Length of time from power application to all RAM clear is rarely a critical factor in most designs. > > - --Brendan > - --- > "Rejection out of hand of all but one's favoured alternative may cost > you dearly in one way or another." -Russell McMahon > > > -----BEGIN PGP SIGNATURE----- > Version: PGPfreeware 6.5.8 for non-commercial use > > iQA/AwUBPWK2aAVk8xtQuK+BEQIO3gCfRNWZgN1eKn6AjD/dZruz2lllwI4AoJfs > 7FANypv2IvEp8Hu88X/8RmjY > =jGHf > -----END PGP SIGNATURE----- > > -- > http://www.piclist.com hint: PICList Posts must start with ONE topic: > [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads > > > === Andrew Warren -- aiw@cypress.com === Principal Design Engineer === Cypress Semiconductor Corporation === === Opinions expressed above do not === necessarily represent those of === Cypress Semiconductor Corporation -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads