On Tue, 20 Aug 2002, Brendan Moran wrote: > > > Well great... and I figured you have a twelve instruction loop that > would do > > > 8 locations at a time. > > > > The 12-instruction thing was just to prevent someone from writing a > > program of 4096 CLRF's and claiming that's the fastest way to clear > > memory. Also, 12 is that mystical number that Dmitry always manages to > > encounter. > > Don't you just wish that you had the post-increment indexed addressing mode > that's available on some larger processors ;) No, not particularly. But then again, we have no idea what you're rambling about. The 18F parts *do* have a post-increment addressing. I hate to Olinize(*), but I think you should spend some time reading about the 18fxxx parts instead of talking about them. Scott (*) Olinize - (verb) - the act of abruptly, sometimes even rudely, pointing out the obvious. No offense to Olin, of course. -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads