I really don't see any advantage to a separate I/O map over use of
memory mapped I/O. The Io/M pin on processor with a separate I/O could be
replaced with one more address line, doubling the size of the memory map.
The use of a separate I/O map requires the processor to have special I/O
instructions. These instructions are always limited when compared with
instructions that operate on memory. So, by using memory mapped I/O, we
get a simpler processor and more powerful instrucions for use on I/O.
        It is true that more bits need to be decoded when using memory mapped
I/O. In simple systems, you might just take the most significant address
line and say that in one state it's talking to memory, in the other it's
talking to I/O. I've typically used a bipolar PROM or a PLD to decode the
address lines into chip selects. One device could generate chip selects
to the memory devices and an I/O chip select. A second device could
further decode the I/O area down to each device.
        I first learned of memory mapped I/O when moving from the DEC PDP-8 to
the PDP-11. I thought memory mapped I/O was a very clever idea then.
Still do!

Harold



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