>>
I keep wondering how more advanced mainboards work, in handheld systems for
example - my main question is, what sort of physical structure does the
"data bus" have, and how (for example) would you define which device on the
system has which memory range.  For example, the Cybiko handheld games
system; the LCD controller is accessible at one memory range, the RAM chip
at another, the ROM at yet another.  The expansion port has yet its own
range.  What about I/O ports (such as on x86 architecture)?
<<

There are two main ways of doing I/O with a processor.

On some processors, like the x86 family, there are special instructions like
IN and OUT that explicitly perform I/O.  The bus cycles caused by these
instructions have a dedicated line that becomes true that indicates this is
an I/O reference.  I/O hardware has to check this line and decode a
relatively small number of address lines to decide if that bus cycle is for
it.  The x86 uses 16 address lines for I/O, and therefore has 65536 possilbe
I/O locations.  Since these "addresses" are only used for I/O, the system
designers can chose to ignore some of the upper bits if they don't use 65K
I/O registers.  Most PC systems decoded only the low 10 or 12 bits.  Address
8012h is therefore the same as 0012h, but nobody uses 8012h.

On other processors, there are no special I/O instructions or bus cycles,
but the external memory address space is large enough so there is always
"extra" room beyond the physical memory.  I/O devices then respond as if
they were ordinary memory at addresses where there is no real memory.  This
can simplify a bunch of thing inside the processor, but each I/O device now
has to pay attention to more bus signals and address lines.  Since the total
address space (used for memory or I/O) is much larger than a traditional I/O
space, devices can map entire buffers or whatever into memory space.
Graphics cards commonly do this.

There are other issues, but this is the basic concept.


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