On Sat, Aug 17, 2002 at 06:49:32PM -0400, Jason Harper wrote: > BAJ wrote: > > OK. Good. Now explain why you have it setup this way? > > Ignore the fact that the onboard processor is a PIC. I'll stick a "Pentium > 7" label on it if that will make you happier! > > It's INFRASTRUCTURE. Asking why the user can't program it directly makes > exactly as much sense as asking why they can't directly use the power > supply filter capacitor in their project. No it's not. In fact it's exactly the opposite. Why doesn't every desktop computer then have 2 or more CPUs, one for infrastructure and the other for actual work then? Most programmable systems (desktops, PDA, etc) the primary CPU provides both the infrastructure (OS) and the target (applications). All I'm asking is why this system should be any different? > > The device (whatever you want to call it) is made much more powerful by the > presence of an onboard dedicated processor. In particular, you'll be able > to directly monitor or supply input to up to 24 of the target PIC's pins, > WITHOUT having to wire up a bunch of LEDs or switches for each project. > How could you possibly do anything like that with only a single processor? But you're defining a behavior that's not going to have major relavence in the vast majority of project development. How many of us use logic analyzers on a daily basis? Roman has been complaining about the complexity curve, now it's my turn. > > This approach means that you can use every single word of program space for > your program, if that's what it needs. Again how often does that occur? BTW that issue has already been addressed in terms of adding a second permanent socket to install a target. The differences are that the second one is optional, and the the mounting of the second target chip is permanent. > Or you can choose to install a > bootloader, if you want to be able to conveniently update the target PIC's > code after it has been moved to a permanent home. Either is an equally > valid use of the system. That's all fine. But none of it (except for the logic analyzer) requires a dedicated chip solely for infrastruture. The internal chip using 1K of program memory and one I/O pin (probably B7 because it's on the end and has the least amount of multiplexed I/O impact) has the enough horsepower to do the vast majority of most design work. BAJ -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email listserv@mitvma.mit.edu with SET PICList DIGEST in the body