> Have a pic 18f452 that is talking to some i2c periphials. The devices
> are ack'ing but only pulling the line to about .3 of vcc on one device
> and .6 on the other 12c device. I know that this is an ack because if I
> change the address the poor attempt at acknowlegement dissapears.
>
> Should the line be pulled to 0 v and if not how low would you expect the
> data line to go during an ack.
> Any suggestions appreciated as the pic won't see the .6 of vcc ack as an
> ack!

Are you using the hardware IIC module?  If not, you are probably using totem
pole drive instead of open collector.  It sounds like the master is actively
pulling up the SDA line while the slave is trying to drive it low for an
ACK.

If you are using the hardware IIC module, make sure the TRIS bits are set
according to the manual.  I haven't used the MSSP on a PIC18 yet, but on the
PIC16 you have to set the TRIS bits for SCL and SDA a particular way (both 1
if I remember right).

If neither of these apply, then check the pullup resistors.  The maximum
allowed source current for either lines at logic low level is surprisingly
low.  I sorta remember around 3mA.  I also sorta remember that the smallest
allowed pullup to +5V comes out to around 2K.


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