Sean wrote:
> 3) I have seen some negative comments about the multiple sockets - and =
I
> wonder if Jason realises that I can buy ZIF sockets quite cheaply.

Even if you could get ZIF sockets for as cheap as LIF, they would take up=

more room on the board - about half an inch more length than LIF, plus
space for the handle when it's down.

> Is there any way we can have a 40 Pin WIDE ZIF socket accomodate ALL
> available PICs?

That's quite doable for programming only, but will inevitably result in
some pins that need to be connected to Vdd/Vss for some chip sizes, but a=
re
normal I/O pins for others.  Not a problem for a programmer, since the
unused I/O pins are inputs during programming, but it wouldn't be very go=
od
for prototyping to have some of your I/O permanently connected to the pow=
er
supply...

The main reason I didn't go for a single-socket design is that it couldn'=
t
give any sort of meaningful names to the breadboard connections - they
would mean entirely different things depending on the size of chip
installed.  HOWEVER, it has just occurred to me how to fix this - a
single-socket programmer/prototyper would have to have some sort of
personality module anyway, to route power to only the appropriate pins fo=
r
any given chip size, and that could also handle routing all of the port
pins to the appropriate pins on the breadboard connector!

So, here's my current idea:
* One 40-pin ZIF socket, plus the 6-pin ICSP connector as before.
* A slot for a personality card, parallel to the ZIF - it looks like it
will need about 80 pins.  Could be edge connector, dual-row header, SIMM,=

etc.
* One personality card for each size of PIC - 8, 18, 28, 40 pin.  They wi=
ll
primarily just consist of traces connecting the ZIF pins to the Designer'=
s
bus, plus one or two OSC connectors as appropriate for the PIC size.  The=

only actual component likely to be on the personality cards is a bypass c=
ap
for the target PIC, this is the closest it could possibly be mounted to t=
he
PIC under this scheme.  Cards other than the 40-pin would have silkscreen=

on the side facing the ZIF socket showing how the PIC should be aligned i=
n
the socket.
* Since the personality cards are solely responsible for connections to t=
he
PIC, they could also contain a socket themselves rather than using the ZI=
F.
 This would be useful for later development of cards for PLCC, SOIC, or
other non-DIP PICs.

This scheme adds another interesting possibility - developing with multip=
le
smaller PICs that will fit simultaneously into the ZIF.  Let's say that t=
he
normal position for a PIC is at the top of the ZIF socket.  The 18-pin
personality card would route the topmost 18 ZIF pins to Vdd, GND, Vpp, an=
d
ports A & B of the Designer's bus.  It could also route the bottommost ZI=
F
pins to Vdd, GND, and ports C & D of the bus, allowing both PICs to be ru=
n
simultaneously (perhaps to develop some sort of communications scheme
between them).  You just wouldn't be able to directly program the second
PIC.  The only cost for adding this feature would be an additional OSC
connector on the personality card!  The 8-pin personality card could
likewise support up to four PICs (multidrop busses, anyone?): I wouldn't
even bother with extra OSC connectors in that case since such PICs are
normally used with INTRC.

The only downside I see to all this is that the oscillator pin connection=
s
are getting rather long: PIC -> ZIF -> personality socket -> personality
card -> OSC connector -> OSC module -> crystal or whatever.  The added
capacitance is certainly going to affect the osc frequency, especially wi=
th
the RC module.
        Jason Harper

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