On Tue, Aug 13, 2002 at 04:49:57PM +0100, Alan B. Pearce wrote: > >The other class on the table is in the extended programmer > >vein. I think that Jason Harpers really cool depiction > >would be representative of that model. > > I do not go along with having all the sockets he depicts. Neither do I. I just thought that it was cool that he took the time to actually draw and post a design. One small note. In every instance below I believe that we should consider the 16F87XA instead of the 16F87X. The program memory of the A part has 100 times the erase/write programming endurance of the original. > I believe it should be restricted to 3 possibilities -: > > > 1. Have a 16F877 as the on-board processor. This could be a DIP version in a > socket, or an SM version permanently soldered in, in which case a separate > 40 pin socket for a DIP chip would be advisable. Makes a lot of sense. Except that your suggestion below is much better. > > 2. Be able to have an 18Fxxx family as a second processor, programmed using > the 16F877 as a programmer. I would envisage this being able to be fitted in > the 40 pin socket mentioned above. If the only processor supplied with the > board is a 16F877 in a socket, then some way of programming to bootstrap > oneself up from a totally blank chip is needed. I can see this one too. There is enough difference in the 16 and 18 families to merit wanting to have one of each at some point in time. This could be the swing point for having a two chip system in place. I'm pretty sure that most of us have abandoned the prospect of bottstrapping from a completely blank chip. The board would come with a preprogrammed chip no doubt. > > 3. be able to program through ICSP connection a 16F627/8, but I don't > envisage having a socket for this processor as a standard part of the board, > but am prepared to bend on this. Again the resident 16F877 acts as the > programmer. Once you have ICSP, you can program pretty much anything. That's why I always had proposed an ISCP port. Then you can do any chip in any package without the baggage of a socket. > > I see no need to be able to handle absolutely every chip Microchip make. If > someone expects to need that, then they should be able to make a case for > getting a Picstart+. True. True. > > This means that the programming side needs to be able to recognise 16F627/8 > (2 chips) 16F87x (4 chips, 6 if 16F870/2 are included) and 18Fxxx (4 chips I > think) by the time 28 and 40 pin versions are considered. The programming software can easily be a downloadable application. One can pick and choose as needed for the particular part to program. The only one magic feature that I'd like to personally see embedded in the firmware is the ability of the onboard processor to clone itself. It would only have to be a single algorithm for a single part. I just feel that the part should be able to back itself up without having to download software to it. But I realize that yould take up some more program memory that could be allocated for development. I'm not married to it, but it is a thought. I just see it as a convenient way to backup the Designer's main processor. > >The hardware would provide a facility so that some subset of > >the PIC family could be programmed with it. Truth be told > >there's enough hardware there to program everything: > >A mini CUMP as it were. > > Well I think we should not be doing the full range of PIC's, and certainly > should not be trying to do any other processor, which is why I have summed > up above the chips I see as being needed to be covered. Actually once an ICSP port is implemented, programming any other PIC with a serial programming interface isn't really a problem. The software can be downloaded, and no socket need be provided. You essentially get a complete PIC programmer for free. > > It may be as time passes that expansion is need to cover USB and/or CAN or > some other special interface versions of PIC's, but hopefully these could be > covered by software upgrades later. > > These would probably also need extra tutorial material to give examples of > how the specific interfaces work, or it could be assumed that if someone is > leaping into those, they know what they are doing, and so should be getting > a PICStart+ and hence we should not be trying to support them with this > board. That however I see as a decision for later once the current spec > requirements are tied down. The ICSP I believe is flexible enough that there > should be no hardware changes (unless Microchip bring out devices with 3.3V > max supplies :)). Exactly. No additional hardware is required to program other PIC parts. So no worries. > > In thinking about what has been written above I get the feeling that there > will have to be two processors on the board, one to handle the programming > functions/ICD host, and the other to be the target. > So I suppose one of them > has to be a 16F876 to handle this, with a 40 pin socket for 16F877/18F4xx > target device. I would expect anyone using this system as a development > board for a 28 pin version of the processor to use the 40 pin version within > this board, and then program their 28 pin in the target system by ICSP. That's been Brenden's proposal from the beginning. He has argued (almost to the point of success ;-) that in that fashion all of the resources of the target processor will be available for the project, instead of losing some measure of program memory and last least 1 I/O pin to the bootloader. It had always been my thinking that a single chip could do the job provided that it offered an ICSP port so that it can program an offboard target chip. I felt that it reduced the complexity of the Designer while offering the flexibility to still program other parts with it. But the prospect of a 16F chip and 18F chip residing on the same box has me willing to change my vote under a few conditions: 1) That both chips/sockets be of the 40 pin variety. 2) That the entire system can in fact be operated with only a single chip in place. 3) That both chips/sockets have equal access to the I/O facilites onboard. 4) We still carry a separate ICSP interface. The two chip system works for me if the second socket is available for an 18F co-upgrade. That's enough to justify adding the boardspace for an addition socket and whatever additional circuitry required for both chips to have I/O access. We get a flexibile multiconfiguration setup that should meet any ordinary need. For the sake of discussion say we call these the P and S sockets for primary and secondary. The Designer is shipped with a 16F877A in the P-socket and the S-socket empty. In this configuration it functions as a standalone 16F prototyping station. Another 40 pin chip can be dropped into the S-socket and can become the fully accessible target processor. It'll be programmed by the P-socket processor. The S-socket chip can be either a 16F877 or more interestingly a 18F452 giving instant 18F developability. In any and all cases the ICSP port can be used to program off board or non 40 pin targets. > > >> Have I managed to sum up the goals ? > > >Couldn't have done it better myself. Seriously, I couldn't. Excellent job. > > Well thank you kind Sir :)) You are quite welcome. BAJ -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email listserv@mitvma.mit.edu with SET PICList DIGEST in the body