My guess then is that the endurance is the number of times a location
can undergo the read/write procedure, I would count 1 for each
read/modify/write even though there are 2 steps in the process. Worst
case you will be out by a factor of 2?

Have looked at some Samsung SmartMedia chips recently and they say
less than 0.1% failure in 1 million program/erase cycles. I think the
idea is it's anyones guess when they actually fail and you need to
take this into account with bad block mangement.

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Brent Brown, Electronic Design Solutions
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eMail:  brent.brown@clear.net.nz

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