-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 > I'm looking to try my hand at using PLD/PGA's. I'm thinking of > starting off with something simple, like flashing LED's controlled > by one of ftdi's usb modules (I've been looking for an excuse to > play with those). Naturally my first thought was to ask the wise > and wonderful piclist for advice. > > So far I've been reading up on Xilinx's stuff, I seem to remember > somebody mentioning that they're best for hobbyists. They're free > WebPack software looks a bit convoluted. Has anybody used it? > > What's the best way to get started? > What kind of programming hardware do I need? > Verilog or VHDL? > Any good books for learning [Verilog | VHDL]? > Any *nix based tools around for this? Personally, I started with the use of SPLDs, though what I used was a 22V10, and that was with a universal programmer. It may not be all that easy for you to do without the universal programmer. I looked at what was required a while ago, and couldn't find a programming spec. Real pain, eh? But someone else might know. I think I've seen a Xilinx rep floating around on the list, so he might be the best person to answer your questions here. Finding a VHDL reference is not easy. I got what I know of VHDL in a course I took. The problem is that VHDL refers to more of the spectrum than just PLDs. It is a language for describing hardware in general. Finding a Verilog reference may be easier, I don't know. If you look at the thread "[OT]: DIP FPGAs: Are there any?" Steve mentions an Altera starter kit for FPGAs (different than SPLDs or CPLDs) Quick info: SPLD: "Simple Programmable Logic Device" Has some registers (D-type flipflops) that can be used or diabled, has multiple inputs, and outputs. Outputs go to pins, but are fed back to allow for internal logic to process the data on an ouput pin. Uses Flash EEPROM for configureation memory CPLD "Complex Programmable Logic Device" Similar to a SPLD but has small groupings called "macrocells" that are like the circuitry to an output pin on a CPLD. Unlike a SPLD, all I/O is configureable as inputs or outputs. FPGA "Field Programmable Gate Array" Similar to a CPLD, but uses a serial data stream on powerup to aquire its configureation. Unlike a CPLD, it can be reprogrammed on the fly. I know I'm being overly simplistic here, but this is how I believe it works. If I'm incorrect, I'd like to know about it. - --Brendan -----BEGIN PGP SIGNATURE----- Version: PGPfreeware 6.5.8 for non-commercial use iQA/AwUBPUrCRAVk8xtQuK+BEQLAJwCfYfMJKu5l58He4V5+VyjEEuFnI+QAn1z5 gx2PwioNjkQ2VOS2FsSzEYLs =acpC -----END PGP SIGNATURE----- -- http://www.piclist.com hint: The PICList is archived three different ways. See http://www.piclist.com/#archives for details.