-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 > >When was the last time you used a serial or parallel port? Or > >anyone else here, for that matter? I think that really, the only > >legacy stuff that can be dropped sensibly is the ISA port. Or, > >what were you thinking of? > > Of course you know what the PIC was originally designed for (the > General Instrument design, not the current PROM based thing). Hehe. > ? > As to what should be dropped, I'd start with x86 compatible code, > which is horrible at the machine level, the CPU, the three big > modes (protected, unprotected and one emulating the other in some > hermaphrodite > arrangement). I'd lose all non-open source code on the way, but I > could run it in emulation, maybe faster than originally intended. A > RISC coprocessor on a PCI card could supply up to 16 512kbps serial > links. Another could supply several parallel port equivalents. Same > for > firewaire, whatever you need. I'd get an embeddable board with > standard connections, with no idiosynchratic 'on board' things, > with peripheral cards, cpu sets and main boards manufactured by > several makers. Kind of like a PC without the mess that's inside > them nowadays. I can see where you're going with this, and it already goes along the lines of what I think. I will not buy a computer with only onboard video or sound. My opinion on the future of the PC architecture... Well, I like haveing an onboard parallel port and 2 onboard serial ports. As Mike misinterpreted, "I use them everyday for several different applications and plan to for the forseeable future. Perhaps you need to rejoin the real world of users." Dropping those off to a card based system seems like more trouble than it's worth. I'd say that instead, the optimal solution is to send those on to the main board and keep everything else in cards. I think that the x86 code is junk too. RISC has some inherent problems with it, though. It becomes eceedingly difficult to execute simple proceedures like multipliy and divide. It makes far more sense to me to go for a RISC-like archtecture where the majority of the instructions are RISC and commonly used functions like multiply and divide are non-RISC and execute in multiple cycles, but only require one opcode. The HC12, for instance is a bit like this, it has multiple built-in multiply and divide opcodes, the smallest mult taking 3 cycles and the divide taking 12 (I think). Oh, and it should be stack oriented, Von-Neuman(sp?), architecture with IO mapped into the memory space, not like those silly inp and outp systems that Intel uses. But serial IO is used so globally useful and takes litterally no processing power to have onboard (that's what UARTs are for), and practically no space... Why not have it onboard? - --Brendan -----BEGIN PGP SIGNATURE----- Version: PGPfreeware 6.5.8 for non-commercial use iQA/AwUBPThyjwVk8xtQuK+BEQJg0wCgv8/hTi2Z59bq0osN2VqxgwwTFa8AoJKO 3KMisI/AGMWNTaEe9TtOD6S5 =+eI1 -----END PGP SIGNATURE----- -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! email listserv@mitvma.mit.edu with SET PICList DIGEST in the body