On Tue, 9 Jul 2002, Jinx wrote:

>I've got this signal
>
>http://home.clear.net.nz/pages/joecolquitt/lv_an.html
>
>going into AN0 of a 16F877. It works but the signal must
>have some negative-going components (or possibly a
>switch glitch) as the port occassionally latches. How can
>I best protect the pin against signals going below Vss-0.6V
>
>According to 20.11 of the Mid-range Manual
>
>"Since the analogue pins are connected to a digital output,
>they have reverse biased doides to Vdd and Vss. The
>analogue input therefore must be between Vdd and Vss. If
>the input voltage deviates from this range by more than 0.6V
>in either direction, one of the diodes is forward biased and
>latch-up may occur"
>
>'kin oath it occurs, mate, 'kin oath

I don't know about kin and oaths but your problems are very narrow (VHF or
UHF) glitches in the input. Add a RLC lowpass filter and check what the
grounds are doing. A resistor in series with AN0 is the very least required.

Peter

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