I might be totally wrong here but if capacitors have leakage, won't that =
affect the battery life ?


-----Original Message-----
From: Spehro Pefhany [mailto:speff@INTERLOG.COM]
Sent: 06 July 2002 13:26
To: PICLIST@MITVMA.MIT.EDU
Subject: Re: [PIC]: .1uf between Vcc and gnd ???


At 09:24 PM 7/5/02 -0700, you wrote:
>Gabriel,
>
>I have a product on the market with NO caps across Vcc and Gnd.
>It is a PIC12C672 run with a 3.6V lithium battery.
>Thousands sold and around the world and not seen any issues from =
leaving
>caps off.
>I decided to do this to save parts count/cost.  Normally I use a 0.1uF, =
but
>in this case I left it off due to the battery being very close to the =
PIC
>(short track).
>I'm sure someone on this list will tell me that what I did was wrong, =
but
>since it works fine I'd be happy to hear from someone at to why it is a =
bad
>idea.

If you don't have any output lines, or there is some resistance in =
series
with them, then there is less need of bypass capacitors. PICs are pretty
tolerant of bypass caps being left off, but I don't do it except on the
bench. As someone else has already mentioned, the internal resistance of
the cell will go up as the battery gets older, so any problems would =
tend
to manifest themselves nearer the end of battery life. Some batches of
chips will be less tolerant than others to the resulting noise on the =
Vdd
line. Future mask revisions may be less or more tolerant. It doesn't =
seem
worth gnawing away at margins for the sake of a penny part that uses no
port pins and little space.

Best regards,

Spehro Pefhany --"it's the network..."            "The Journey is the =
reward"
speff@interlog.com             Info for manufacturers: =
http://www.trexon.com
Embedded software/hardware/analog  Info for designers:  =
http://www.speff.com
9/11 United we Stand

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