At 17:24 21-06-02, Alexandre Guimar=E3es wrote:
...
>    If we could trigger using 2 words in a sequence it would make the
>instrument even more valuable. That would help a lot to debug programs and
>get a nice trigger signal for the scope. Not essencial but nice. I would=
 not
>mind having the memory as a circular buffer and have the trigger point
>always in the middle of the captured memory or have it at a fixed position.
>The post trigger size could be fixed to make the design easier. If we have
>enough memory the clock options can be simpler also.

    Alexandre, these types of add-ons are part of what doomed my earlier
project a few years ago. It collapsed under its own weight ;-)

    I want to keep the trigger path as short as possible. When you consider
the delays from the pod buffer to the trigger comparator, to the control
logic to the SRAM, the maximum sample rate drops dramatically...

    By providing a basic core optimized for speed, folks can add any=
 features
they desire. In your example above, you can still add multiword triggering.
Just send it's final trigger output to the core. Another example is the
clock. Setting the polarity, source, etc, will be handled external to the
core. I could easily add such features but every inverter/gate/register adds
Xns to the path... I want to leave these decisions up to the user. Since I
want 32-Bit capture, I'll be doing a `glue' chip to provide special features
but in the end, it will still be just one version tailored to my needs and
by its nature, full of compromises. This may or may not be useful to others
but I'll be glad to share it.

    - Tom

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