At 15:24 24/06/2002 +0000, Drew Vassallo wrote:
>>1. I select the channel.
>>
>>2. Then I am allow for an acquisition time of 22 us (the datasheet
>>    mentions 20 us for a 10 K source)
>>
>>3. Then I start the conversion (set the 'GO' bit)
>>
>>4. Once the conversion is over, I wait _at least_ 11 us (the
>>    datasheet also mentions that a delay of 2 x Tad needs to be
>>    honoured here)
>>
>>5. Go back to step 1, but with the next channel.
>
>This sounds ok to me, except for the fact that there may be a problem with
>your code, not your logic.

Of course :)


>How about posting the A/D conversion section of your code?

Sure. I didn't post it because the original message was already
long enough without any code, but here it is.

1. Variables and constants:

adc1_M:1
adc1_L:1
adc2_M:1
adc2_L:1
adc3_M:1
adc3_L:1
state:1


2. The initialisation section:

     bsf     STATUS, RP0                 ; Bank1
     bsf     TRISA, 0                    ; AN0 as input
     bsf     TRISA, 1                    ; AN1 as input
     bsf     TRISA, 3                    ; AN3 as input
     movlw   b'10000100'                 ; AN0, AN1, AN3, right justified
     movwf   ADCON1                      ; (RA5, RA2 = digital inputs)
     bcf     STATUS, RP0                 ; Bank0
     movlw   b'10000001'                 ; Fosc/32 (20 MHz clock)
     movwf   ADCON0

     clrf    state                       ; init vars
     clrf    adc1_M
     clrf    adc1_L
     clrf    adc2_M
     clrf    adc2_L
     clrf    adc3_M
     clrf    adc3_L


3. The A/D code from the main loop

The AD code is embedded in the main loop of the application. This
main loop takes 11 us minimum, 60 us maximum. I ensure that all delays
are honoured by implementing the A/D code as a state machine with
state transitions taking place on each iteration of the main loop.
I have defined the following states:

               Trigger       Action                  Next state
               ---------------------------------------------------
ADC_IDLE      -             Start acquisition       ADC_ACQ1
ADC_ACQ1      -             -                       ADC_ACQ2
ADC_ACQ2      -             Start conversion        ADC_RUNNING
ADC_RUNNING   ADIF=0        -                       ADC_RUNNING
ADC_RUNNING   ADIF=1        -                       ADC_IDLE

You can see that from "Start acquisition" from "Start conversion"
there are two state transitions, so two iterations of the main loop
(i.e. minimum 22 us for the acquisition). Also, after the conversion
is finished, there is one complete iteration before the next
acquisition starts (so that's again 11 us minimum).

The states are encoded in the three LSBs of the 'state' variable:

               state[2:0]
               ----------
ADC_IDLE         XX0          == ADC is idle
ADC_ACQ1         X01          == ADC in acquisition stage (1/2)
ADC_ACQ2         011          == ADC in acquisition stage (2/2)
ADC_RUNNING      111          == ADC in conversion stage



The actual code:


ADC
     ;
     ; Is ADC busy?
     ;
     btfsc   state, 0
      goto   _adc_busy

     ;
     ; ADC is idle, save the converted value in the corresponding vars
     ; and select the next channel (acquisition starts automatically)
     ;
     ; The configuration bits (ADCON0 register) are:
     ;
     ; Channel  CHS0    CHS1
     ;   1       0       0
     ;   2       0       1
     ;   3       1       1
     ;
     bcf     ADCON0, ADON                ; turn off ADC (to change config)
     btfss   ADCON0, CHS0
      goto   _adc1
     btfss   ADCON0, CHS1
      goto   _adc2
     bcf     ADCON0, CHS0                ; was channel 3: next one is 0
     bcf     ADCON0, CHS1
     movfw   ADRESH                      ; get the converted value
     movwf   adc3_M
     bsf     STATUS, RP0                 ; Bank1
     movfw   ADRESL
     bcf     STATUS, RP0                 ; Bank0
     movwf   adc3_L
     goto    _adc_restart
_adc1
     bsf     ADCON0, CHS0                ; was channel 1: next one is 2
     movfw   ADRESH                      ; get the converted value
     movwf   adc1_M
     bsf     STATUS, RP0                 ; Bank1
     movfw   ADRESL
     bcf     STATUS, RP0                 ; Bank0
     movwf   adc1_L
     goto    _adc_restart
_adc2
     bsf     ADCON0, CHS1                ; was channel 2: next one is 3
     movf    ADRESH, W                   ; get the converted value
     movwf   adc2_M
     bsf     STATUS, RP0                 ; Bank1
     movfw   ADRESL
     bcf     STATUS, RP0                 ; Bank0
     movwf   adc2_L
_adc_restart
     bsf     ADCON0, ADON                ; turn the ADC module on again
     bsf     state, 0

     goto _adc_end

     ;
     ; ADC is busy, is the acquisition in progress?
     ;
_adc_busy
     btfsc   state, 1
      goto   _adc_acqdone
     bsf     state, 1

     goto    _adc_end

     ;
     ; Acquisition is complete, should we start a new conversion?
     ;
_adc_acqdone
     btfsc   state, 2                    ; conversion started?
      goto   _adc_is_running             ; = YES, check conversion status

     bsf     ADCON0, GO                  ; = NO, start conversion
     bsf     state, 2                    ; change to ADC_RUNNING state
     goto    _adc_end                    ; end ADC processing

     ;
     ; Conversion already started, is it complete?
     ;
_adc_is_running
     btfss   PIR1, ADIF                  ; data ready?
      goto   _adc_end                    ; = NO
     bcf     PIR1, ADIF                  ; = YES, clear AD conversion flag
     clrf    state                       ; clear flags register

_adc_end



TIA,
G.

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