On Fri, Jun 21, 2002 at 04:31:54PM +0100, Alan B. Pearce wrote:
> >He is looking for controllerless flash memory - the
> >controller adds one more point of failure in a
> >radiation intense environment.
>

Exactly.

> I suspect that the problems of radiation erasing the flash device is
> probably an order of magnitude higher than problems with the controller, but
> have no figures to back this up.

The radiation tests show, that FLASH memories are the best devices to store
information in such environment (the longest expected time to single bit
corruption).
The controller has to be designed in a special way to eliminate at least the
SEU (Single Event Upset) effect. I think the controllers embedded in common
FLASH cards are not built that way :-(.
I can design my own controller to assure the appropriate level of "radiation
hardness", but I have to detect/correct memory errors.

Another solution may be a RAM chip with a controller performing cyclical
read/error correction/write operations. (The expected time between
single bit corruptions for typical RAM will be 10-100s for that
radiation level).

BTW. The built in ECC systems found in many modern memories are rather
obstacle to get the proper results...

On Fri, Jun 21, 2002 at 04:28:40PM +0100, Alan B. Pearce wrote:

> What sort of radiation level?
>
> Instruments on space craft these days routinely use flash memory for the on
> board processors, and these can be suitably shielded to 100k and 300k Rad
> levels. This shielding includes the aluminium box, and if necessary a
> tantalum metal piece is glued onto the most sensitive chips.

There is no way/no place to assure the enough shielding. The whole thing
will work in a detector very near to the bunch crossing point of an
accelerator.

> It may be that you will need to talk to chip manufacturers to get the
> specifics of what level and type of radiation they can withstand.

AFAIK there was no way to obtain that data from manufacturers so we had
to collect data about the radiation hardness performing our own tests...
(see eg. http://lhcb-elec.web.cern.ch/lhcb-elec/html/radiation_hardness.htm
or http://www-ekp.physik.uni-karlsruhe.de/~dierlamm/irradiation_center
or http://www.google.com/search?q=cache:LS5A3lKzPF8C:www-hep.fzu.cz/pixpage/IRR/RHAWG1.pdf
)

> Essentially if a chip is using 0.25 micron or finer geometry it will be
> inherently radiation proof to a significant level.

The design will be implemented in a few thousands of boards, so it must
be REALLY price optimized.

> People involved with Physics Resaearch may also be able to help you,
> where they have built detectors for particle accelerators and the like, but
> I get the feeling that this is the area you are dealing with.

Exactly, this is the case.

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