Hi!

I am not sure if this is what you want but this works in ASIC/FPGA's

 proc_data <= proc_data_out_i when (proc_data_en_i = '1')
               else (others => 'Z');

Where proc_data is your pin(s)

MD

On Fri, 14 Jun 2002, Brendan Moran wrote:

> Hi all, It's been a while since I did much intesive work in VHDL, and
> I'm forgetting some things about it.  I cannot, for the life of me, see
> how, in VHDL, to set a series of outputs to Hi-Z asynchronously, even
> though I can tell it's possible from the internal fuse diagram. (working
> with the 22V10 here)
>
> If any of you know how to do that, or where to find a good reference,
> I'd appreciate it.  I havent even found any decent online references so
> far.
>
> --Brendan
>
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