On Wed, 12 Jun 2002, Jonathan Starr wrote:

> This damn project seems to be more trouble than it's worth, if anyone mathematically minded can help me with this I would be very grateful.
>
> Okay, I have a ADC input that has full range (ie. 0 to 255) and basically it needs to cause a delay like this:
>
> ADC_VAL                Delay in cycles
>
> 0                              400
> 255                          3200
>
> So this really means that each decimal '1' of ADC_VAL equates to 11
> cycles extra delay, ok so its not exactly 11 but it'll do, it'll only be
> 5 cycles off at the end.
>
> Now here comes the part that is giving me grief, I can do 3205 cycles
> with a two tier nested delay, but there are two values that affect the
> delay time, the inner and outer loop variables. I think the way to do it
> would be too divide the required delay into 255 to get a carry (whole
> numbers) and the rest would go into the inner loop ie. the stuff after
> the decimal point to 3 sig figs.

Why bother with a nested loop? If you need 11 cycles per adc count, then
write a loop that will execute 11 cycles for each iteration:

Loop_11cycles:

     goto     $+1   ;0,1
     goto     $+1   ;2,3
     goto     $+1   ;4,5
     goto     $+1   ;6,7

     decfsz   counter,f      ;8
      goto    Loop_11cycles  ;9,10


Scott

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