At 21:48 12/06/2002 +1200, Russell McMahon wrote:
>ADC results stored in different banks during processing but read back from
>same bank afterwards?
>(Not seeing you code which reads the data subsequently this is only a
>(mentat-ed?) guess).

Of course..

Thanks!
G.


>         RM
>
>
>----- Original Message -----
>From: "Guillermo Rodriguez Garcia" <guille@IIES.ES>
>To: <PICLIST@MITVMA.MIT.EDU>
>Sent: Wednesday, June 12, 2002 9:08 PM
>Subject: [PIC]: 10-bit ADC with 16F877, anyone?
>
>
> > Hello all,
> >
> > I seem to have a problem with the 10-bit ADC on the 16F877. As
> > you know, the ADC uses two 8-bit registers to store the result:
> > ADRESH and ADRESL. In the ADC config you can choose to have the
> > converted values left-justified or right-justified, as only 10
> > bits out of these 16 are needed:
> >
> > Left-justified:
> >
> > ADRESH           ADRESL
> > xxxxxxxx         xx000000
> >
> > Right-justified:
> >
> > ADRESH           ADRESL
> > 000000xx         xxxxxxxx
> >
> > (where xxxxxxxx is the actual value)
> >
> > Now the problem we have is that regardless of the configuration
> > I try, I always read a zero in ADRESL, so I have either two valid
> > bits or eight valid bits, but never ten bits.
> >
> > I've searched the archive in www.piclist.com but all ADC code I
> > can find always uses 8-bit results only, configuring the ADC to
> > be left-justified and neglecting the ADRESL register.
> >
> > Has anyone found this problem before? Any hints?
> >
> > Code follows:
> >
> > === Cut ===
> >
> > Startup
> >      bsf     STATUS, RP0         ; Bank1
> >      movlw   b'11111111'         ; PORT A = all inputs
> >      movwf   TRISA
> >      clrf    TRISC               ; PORT C = all outputs
> >
> >      bcf     STATUS, RP0         ; Bank0
> >      movlw   b'01000001'         ; Fosc/8, A/D enabled
> >      movwf   ADCON0
> >
> >      bsf     STATUS, RP0         ; Bank1
> >      movlw   b'00001110'         ; Left justify, 1 analog channel
> >      movwf   ADCON1              ; VDD and VSS references
> >
> >      movlw   b'10000111'         ; TMR0, 1:256
> >      movwf   OPTION_REG
> >
> >      bcf     STATUS, RP0         ; go back to Bank0
> >
> > Main
> >      ;
> >      ; acquisition time before starting the AD conversion
> >      ;
> >      clrf    TMR0                ; ensures that we start a complete T0
> > cycle here
> >      bcf     INTCON,T0IF
> > _T0Wait
> >      btfss   INTCON,T0IF         ; wait for Timer0 to timeout
> >      goto    _T0Wait
> >      bcf     INTCON,T0IF
> >
> >      ;
> >      ; starts the AD conversion
> >      ;
> >      bsf     ADCON0,GO           ; start A/D conversion
> > _waitAdc
> >      btfss   PIR1, ADIF          ; conversion complete?
> >      goto    _waitAdc            ; = NO (wait)
> >
> >      bcf     PIR1, ADIF          ; clear conversion complete flag
> >
> >      movf    ADRESH, W           ; get the 8 MSBs
> >      movwf   adc_high
> >      bsf     STATUS, RP0         ; Bank1
> >      movf    ADRESL, W           ; get the 2 MSBs
> >      movwf   adc_low
> >      bcf     STATUS, RP0         ; Bank0
> >
> >      goto    Main                ; Loop forever
> > === Cut ===
> >
> >
> > Thanks,
> > G.
> >
> > --
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> >
> >
>
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