On Tue, 11 Jun 2002, Dwayne Reid wrote:

> At 01:34 PM 6/11/02 -0400, Bob Ammerman wrote:
> > >
> > > You have 2 potential problems: input impedance and acquisition
> > > time.  Microchip specifies that your source impedance should be no higher
> > > than 10K - you have a worst case source impedance of 25K (when the pot is
> > > in the exact middle).  The cure is simple - add a 0.1 - 1 uF cap from the
> > > analog input to gnd.  The cap supplies the charge required when the input
> > > is sampled and restores full accuracy to the a/d input.
> >
> >This is _not_ a complete cure because, in addition to the CHOLD charge time,
> >there is leakage on the input pin that can pull the voltage away from where
> >the pot sets it.
>
> True.  I did not mean to imply that the cap cures all the effects of too
> high a source impedance and perhaps I should have stated that in my initial
> post.  But the predominant error source seems to be from the S/H cap and
> not leakage.
>

  Right. The input impedance can be higher than 10k. But the SH capacitor
must have enough time to charge. The problem is not so evident using just
one ad input. But the required aquisition time must be at least doubled
when more than one ad input is used and imput impedance is 10...20K. Our
friend from Israel forgot to use the minimum delay of 20uS or so after
channel switching. He has no problem with the impedance for sure.
But may have problems with cumulative noises because the filtering cap at
high input impedances is not recommended.

Vasile

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