At 01:34 PM 6/11/02 -0400, Bob Ammerman wrote:
> >
> > You have 2 potential problems: input impedance and acquisition
> > time.  Microchip specifies that your source impedance should be no higher
> > than 10K - you have a worst case source impedance of 25K (when the pot is
> > in the exact middle).  The cure is simple - add a 0.1 - 1 uF cap from the
> > analog input to gnd.  The cap supplies the charge required when the input
> > is sampled and restores full accuracy to the a/d input.
>
>This is _not_ a complete cure because, in addition to the CHOLD charge time,
>there is leakage on the input pin that can pull the voltage away from where
>the pot sets it.

True.  I did not mean to imply that the cap cures all the effects of too
high a source impedance and perhaps I should have stated that in my initial
post.  But the predominant error source seems to be from the S/H cap and
not leakage.

The message that started this thread referred to a specific problem that
was caused by either of 2 problems: not enough acquisition time or too high
a source impedance.  I goofed on the source impedance - too quick on the
keyboard.  But *if* the source impedance had in fact been 25K and if the
error was caused by that too-high source impedance (not acquisition time),
adding the cap as I stated would have cured the problem.

dwayne



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Dwayne Reid   <dwayner@planet.eon.net>
Trinity Electronics Systems Ltd    Edmonton, AB, CANADA
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