Hi all,

Perhaps I'm not understanding something here, but how does the cap help
with the leakage current? Isn't their always leakage current on the pin,
regardless of whether you are sampling or not?

Sean

At 02:50 PM 6/11/2002 -0600, you wrote:
Nope - I disagree here.  Been there, done that, spent rather a long time
>verifying performance.  Cross talk is definitely NOT made worse by adding
>the cap.
>
>But I should qualify my statement: the addition of the cap reduces the
>effect of series impedance so long as the sample rate is rate is slow
>enough that the charge removed (or added) during the sample process is
>completely restored before the next sample occurs.  A quick look at the
>ratio between how long the sample switch is closed on a particular channel
>vs how long it is open suggests that this is not a problem if sampling only
>2 channels at the fastest possible sample rate and definitely not a problem
>is sampling 4 channels or more.
>
>Its absolutely not a problem with 100K series resistors and 1 uF caps when
>sampling channels at a 1 ms rate - again, I spent a lot of time verifying
>accuracy in one project before deciding it was OK.    But take away the
>capacitors - not acceptable.
>
>dwayne
>
>--
>Dwayne Reid   <dwayner@planet.eon.net>
>Trinity Electronics Systems Ltd    Edmonton, AB, CANADA
>(780) 489-3199 voice          (780) 487-6397 fax
>
>Celebrating 18 years of Engineering Innovation (1984 - 2002)
>  .-.   .-.   .-.   .-.   .-.   .-.   .-.   .-.   .-.   .-
>     `-'   `-'   `-'   `-'   `-'   `-'   `-'   `-'   `-'
>Do NOT send unsolicited commercial email to this email address.
>This message neither grants consent to receive unsolicited
>commercial email nor is intended to solicit commercial email.
>
>--
>http://www.piclist.com hint: PICList Posts must start with ONE topic:
>[PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads
>

--
http://www.piclist.com hint: PICList Posts must start with ONE topic:
[PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads