Though i have often used Diode-Resistor logic myself successfully, i have=
 some minor doubt about reliability in some situations, and now i grab the=
 opportunity to discuss:

Diode-resistor cirquit, Out is high when both A anb B is high:
   (A)--|<--(out)--[R]---(B)

1) Diode capacitance
   (A)--||--(out)--[R]---(B)
Think initially both A and B are low.
Then A goes high.  This will cause a short positive glitch on out!
How short on diode capacitance and R.  A risetime/curve and the=
 charactersistic of the input connected to out will also affect wether the=
 glitch will cause next gate to react. =20
Remedy: use fast low cap diode, low R, slow gate on output.  Also any=
 capacitance on out (suchas the gate it connects to) dampens the glitch. =20
If the cirquit have more inputs (more diodes) and is guaranteed never to=
 switch high at the same time the problem is less (the diodes not switching=
 dampens the glitch).
If the cirquit have more inputs (more diodes) and all switch high at the=
 same time the problem is worse (think all cap in parrallel).  (note a diode=
 logic AND on a binary counters alla outputs is OK as only one at a time=
 switch high, the other diodes dapmens the glitch, as discussed)


2) Diode Recovery time
   (A)--|<--(out)--[R]---(B)
Think B is high, A is low  =3D> Current flows in the diode and output is=
 low. OK
While current flows, now quickly rise A and lower B simultaneously.  Outpus=
 shuld remain low, but: Because of the diodes reverse recovery time, now=
 *the diode will shortly pull out high* !!  NOT OK
Remedy: 1) avoid this situation *).  2) use fast low cap diode, low R, slow=
 gate on output

*) in this situation, where A and B are outputs from a binary counter:=
 assign A and B respectively to the right Q to avoid this situation.  (MSB=
 to resistor, LSB to diode)  And there should be no problem.

Often it is better (safer) to use resistor-transistor stages, or maybe a=
 cheap IC is cheaper considering less components to mount.

(However i have never realised problems with CMOS4000, 5V, 1N4148, and about=
 10k resistors, but have only used it in production once)

/Two ore from Morgan - The pessimist  (always kill problems before they kill=
 you(r project) There are many pitfalls in "simple" cirquits...


Hej Russell McMahon. Tack f=F6r ditt meddelande 21:50 2002-05-27 enligt=
 nedan:
>> >  I have now gone to a 4040 counter with a naughty two diode and=
 resistor
>"AND
>> >  gate" to drive the reset. Resistor from RESET to Vcc. Diodes from Q1
>and Q3
>> >  to RESET (Anode ends). When both outputs are high the diodes block,
>resistor
>> >  pulls up reset line and both Q's fall again. The resultant reset pulse
>is
>> >  therefore "just long enough:" to cause reset and has the potential to
>only
>> >  partially reset the IC. As I am using just the first two stages the
>chances
>> >  for erroneous operation MAY be reduced compared to higher divide
>ratios.
>>
>> This should be reliable.  But you can eliminate 1 diode - use the=
 resistor
>> in place of the diode.  If you think about it, you wind up with the same
>> logic.  The pin with the resistor has to be HI before the reset can=
 occur,
>> the pin with the diode also has to be HI or it is still clamping the=
 reset
>> pin LO.  In other words, 1 resistor and 1 diode makes an AND gate.
>
>Aaaagh ! - brilliant (yet so obvious in retrospect).
>Saves a diode (with attendant component, space, loading).
>A small but worthwhile victory and I can't see that it would affect the
>operation in any adverse way.
>Wonder if the reset race condition becomes more marginal? Well done!

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