--ew6BAiZeqk4r7MaW Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi All, I needed to define PIC16F877 registers for my C program compiled with SDCC. I took the p16f877.inc from gputils package and converted it to match SDCC requirements (following suggestions from thr last Scott Dattalo's message). I hope that this include file may be useful for other users of PIC port of SDCC. It has not been tested very carefully, so it may contain errors, please fill free to send any corrections/improvements. Please consider this code to be in public domain (unless its dependency on original p16f877.inc places other limitations - sorry I'm not a lawyer). -- Regards, Wojciech M. Zabolotny wzab@ise.pw.edu.pl http://bach.ece.jhu.edu/~haceaton/pcb - Design your PCB's in OpenSource extensible environment!!! --ew6BAiZeqk4r7MaW Content-Type: text/x-chdr; charset=us-ascii Content-Disposition: attachment; filename="p16f877.h" // Register declarations for PIC 16F877 // Written by Wojciech M. Zabolotny (wzab@ise.pw.edu.pl) 18.05.2002 // Public domain code // (However heavily based on p16f877.inc included in gputils package, // BIT_AT macro was proposed by Scott Dattalo) sfr at 0x0 INDF; sfr at 0x1 TMR0; sfr at 0x2 PCL; #define STATUS_ADR 0x3 sfr at STATUS_ADR STATUS; sfr at 0x4 FSR; sfr at 0x5 PORTA; sfr at 0x6 PORTB; sfr at 0x7 PORTC; sfr at 0x8 PORTD; sfr at 0x9 PORTE; sfr at 0xa PCLATH; #define INTCON_ADR 0xb sfr at INTCON_ADR INTCON; #define PIR1_ADR 0xc sfr at PIR1_ADR PIR1; #define PIR2_ADR 0xd sfr at PIR2_ADR PIR2; sfr at 0xe TMR1L; sfr at 0xf TMR1H; #define T1CON_ADR 0x10 sfr at T1CON_ADR T1CON; sfr at 0x11 TMR2; #define T2CON_ADR 0x12 sfr at T2CON_ADR T2CON; sfr at 0x13 SSPBUF; #define SSPCON_ADR 0x14 sfr at SSPCON_ADR SSPCON; sfr at 0x15 CCPR1L; sfr at 0x16 CCPR1H; #define CCP1CON_ADR 0x17 sfr at CCP1CON_ADR CCP1CON; #define RCSTA_ADR 0x18 sfr at RCSTA_ADR RCSTA; sfr at 0x19 TXREG; sfr at 0x1a RCREG; sfr at 0x1b CCPR2L; sfr at 0x1c CCPR2H; #define CCP2CON_ADR 0x1d sfr at CCP2CON_ADR CCP2CON; sfr at 0x1e ADRESH; #define ADCON0_ADR 0x1f sfr at ADCON0_ADR ADCON0; #define OPTION_ADR 0x81 sfr at OPTION_ADR OPTION_REG; sfr at 0x85 TRISA; sfr at 0x86 TRISB; sfr at 0x87 TRISC; sfr at 0x88 TRISD; #define TRISE_ADR 0x89 sfr at TRISE_ADR TRISE; #define PIE1_ADR 0x8c sfr at PIE1_ADR PIE1; #define PIE2_ADR 0x8d sfr at PIE2_ADR PIE2; #define PCON_ADR 0x8e sfr at PCON_ADR PCON; #define SSPCON2_ADR 0x91 sfr at SSPCON2_ADR SSPCON2; sfr at 0x92 PR2; sfr at 0x93 SSPADD; #define SSPSTAT_ADR 0x94 sfr at SSPSTAT_ADR SSPSTAT; #define TXSTA_ADR 0x98 sfr at TXSTA_ADR TXSTA; sfr at 0x99 SPBRG; sfr at 0x9e ADRESL; #define ADCON1_ADR 0x9f sfr at ADCON1_ADR ADCON1; sfr at 0x10c EEDATA; sfr at 0x10d EEADR; sfr at 0x10e EEDATH; sfr at 0x10f EEADRH; #define EECON1_ADR 0x18c sfr at EECON1_ADR EECON1; sfr at 0x18d EECON2; // ---- BIT DEFINITIONS ----------------------------------------------------- //Build the bit address from the register addres and bit number #define BIT_AT(base,bitno) bit at ((base<<3)+bitno) //Build the bit number from the bit address #define BIT_N(bitad) (bitad & 0x7) //Build the bit mask from the bit address (doesn't work at the moment) #define BIT_M(bitad) (1<uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads