Hi Russell,

Thank you for the reply. After reading what you wrote the passage starts
making sense.

But I still have questions.

1.) Do I need to test all the input/output ports? It's impossible to do all
the ports. Perhaps all that is required is to devote two ports (one input
and one output) from the processor to do the testing. Once the test is
passed, assume all ports are OK. Am I right?

2.) The test should be a periodic test. (Right?) How frequent should the
test be done?

Hope you can provide insights on it too.

Thanks,
Tony Pan

----- Original Message -----
From: "Russell McMahon" <apptech@PARADISE.NET.NZ>
To: <PICLIST@MITVMA.MIT.EDU>
Sent: Monday, May 06, 2002 6:03 PM
Subject: Re: [PIC]: What is Testing Pattern for input


> Note that this is only my uninformed interpretation (but I think its about
> right :-) )
> .
> I have never met the standard but I would translate the requirement
thusly -
>
> > Testing pattern denotes a fault/error control technique used for
periodic
> > testing of input units, output units and interfaces of the control.
>
> A test pattern which consists of a series of various inputs and output
> measurements is applied to all relevant I/O lines to test for improper
> operation.
>
> > A test pattern is introduced to the unit
>
> Various combinations of input signals (which are expected to produce a
> useful test condition) are applied to the inputs
>
> > and the results are compared to expected values.
>
> and the results on the output lines are compared to expected values.
> [[that one was easy :-) ]]
>
> > Mutually independent means for introducing the test pattern and
> > evaluating the results are used.
>
> The equipment applying the test signals and ther equipment doing the
> measurement of the outputs should preferably not be controlled by the same
> controller and should use essentially independent equipment and voltage,
> current etc references [[ so that a fault in the test signal generator
will
> not be masked by its own failure. Independent voltage sources etc ensire
> that using a common erroneous reference will not hide a fault etc]].
>
> > The test pattern is constructed so as not
> > to influence the correct operation of the control.
>
> The test pattern should not apply signals which are known to cause the
> "control" to operate incorrectly.
> [[I assume that the "control" is the equipment under test - this is a
> slightly strange requirement if all possible inputs are possible :-) as it
> seems to say that you can avoid normally illegal inputs even though they
are
> known to cause failure if they do occur. If     "apply signal" includes
> varying test voltages etc this could be reasonable as you should only
apply
> voltage switching normal spec OR within the acceptable fault resistant
range
> of the equipment. eg if a logic input expects 0-5 volt and is specified to
> resist +/-500v without failure then you should not apply 1000v during
> testing. ]].
>
>
>
>
>         Russell McMahon
>
> --
> http://www.piclist.com hint: To leave the PICList
> mailto:piclist-unsubscribe-request@mitvma.mit.edu
>
>

--
http://www.piclist.com hint: To leave the PICList
mailto:piclist-unsubscribe-request@mitvma.mit.edu