This refers (I believe) to the gate (the other
terminals being the Drain and Source) 'length'
in the channel in the FET (MOSFET) which are the
active devices used as 'switches' (transistors)
in Intel's microprocessor line.

The smaller the gate 'length' the faster the device.

(I did a stint as a DC Test Engineer at GaAs MMIC front
end some years ago. These 'gates' at the time were written
using e-beams (electron beams) as oposed to optical
lithography) due to their extremely fine sizes.)

Jim

----- Original Message -----
From: "rad0" <rden25@MINDSPRING.COM>
To: <PICLIST@MITVMA.MIT.EDU>
Sent: Thursday, April 25, 2002 11:55 AM
Subject: [ot]: when intel says 90 nanometer wafer fabs


> what does this mean?
>
> Is this 90 nanometers between components on the chip or
> what?
>
> One of the round platters seen on the comercials contains many
> chips that are sliced off and packaged up, correct?
>
> Can someone give a brief description of the terminology/layout
> of the setup/process?
>
> Thanks
>

--
http://www.piclist.com#nomail Going offline? Don't AutoReply us!
email listserv@mitvma.mit.edu with SET PICList DIGEST in the body