On Wed, Apr 03, 2002 at 07:56:19AM -0500, Olin Lathrop wrote:
> > >         bsf Portc,3             ;port C bit 5 low
> > >         bcf portc,3             ;so pulse bit 3 four times
> > >         bsf Portc,3
> > >         bcf portc,3
> > >         bsf Portc,3
> > >         bcf portc,3
> > >         bsf Portc,3
> > >         bcf portc,3
> > >         goto MAIN
> >
> > This sort of coding is not recommended in PICs.
> >
> > I think you are better off doing something like this, or keeping a
> > shadow register for portc.
> >
> > ; xxxx  = bits that are previously set or cleared.
> >
> >         movlw b'xxxx1xxx'       ; PORTC,3 = 1
> >         movwf PORTC
> >         movlw b'xxxx0xxx'       ; PORTC,3 = 0
> >         movwf PORTC
> >
> >         etc
>
> There is nothing wrong with successive BCF BSF as long as you understand the
> implications.  It is better to learn the issues than to blindly always use a
> shadow register.  Many times you won't need that.

So lte's talk about the issues right quick. PIC instructions are executed
on a 4 subcycle clock. Cycles are labeled Q1 to Q4. BSF and BCF instructions
are read modify write instructions, which means that they read the
WHOLE!!! register, modify the contents and write the results. The final issue
that that when a port is read, only the actual state of the pin is read, never
the output latch. This is true even when the pin is configured as an output.
The last item is probably the only thing I would like to see changed in PIC
silicon.

OK so let's take two successive port BSF instructions on a port starting
with all 0's:

        BSF     portc,0
        BSF     portc,1

With read modify write instructions the port is read on clock Q1 and written
on clock Q4. So here's what happens with the first instruction

; portc=00000000. Read at Q1
        BSF     portc,0
; portc=00000001. output latch written on Q4

Note that the output latch is written. On a completely unloaded pin the output
pin would flip from a 0 to a 1 immediately. However if the pin is loaded down
with capacitance, say a MOSFET or an RC filter, it make take a bit of time
for the actual state to change. For the sake of argument let's say that's the
case and the pin doesn't immediately flip from a 0 to a 1. Now the next
instruction:

; portc=00000000. Read at Q1. REMEMBER THE PIN IS READ, NOT THE LATCH!!!!
        BSF     portc,1
; portc=00000010. output latch is written on Q4

Here's the glitch. Since the pin is read and not the latch, and the pin hasn't
changed state yet, the subsequent read of the pins reads the wrong value, which
is modified and written back to the latch.

So care must be taken when doing a read-modify-write instruction to a port
because other pins may be inadvertently affected. One of the two normal ways of
resolving this issue when it occurs is to keep a shadow register of the
latch which is modified and then written. Since the shadow register isn't
affected by the input pins, they maintain their proper state.

The other resolution is to simply give output pins enough time to settle
after a RMW instruction before issuing another. Of course this is dependant
on the capacitive loads that are connected to the port. But under normal
circumstances, a one NOP delay is usually enough time to give the pin to
settle to the same state as the port.

Olin's right on the mark about understanding the issues. It allows the
designer to make appropriate decisions on how to process this particular
piece of code.

Of course I still fault microchip for not adding the extra multiplexer
that would route the output latches of a port for the bits set to output.
Then the problem would disappear in its entirety.

BAJ

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