>I have done this with great success on a 16f84a
>running at 4mhz except my first delay was at 156us.
>  (who cares about start-bit confirmation ;-D)
>It works very well.

You would be well advised to worry about start bit verification unless
working in a known noise free environment. It will save a lot of hassle with
apparently corrupted messages. You only need one noise pulse 100uS earlier
than your start pulse and your whole byte is shifted one bit right, with the
highest bit being a 0.

I speak from experience here, having seen noise pulses produce many
extraneous interrupts on a processor because the designer did exactly this,
filling the buffer with much extraneous junk.

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