> And if the two PICs are clocked from the same signal, then you wouldn't > even have that. If MCLR is not synchronized to CLKin then it may meet setup on one PIC but not on the other. This would result in the two PICs being off by one cycle. Bob Ammerman RAm Systems > Since the PIC is fully static, it would be very easy to test it out by > slow clocking (4Hz) or even hand clocking two identically programmed > pics. Something I've wanted to do since the first time we talked about > it oh so long ago... > > -Adam > > Bob Ammerman wrote: > > >If this is expected to _truly_ synchronize two PICs one might expect that > >they will run clock-for-clock identically if MCLR is brought up with an > >appropriate setup time relative to OSCin (assuming an external osc). > > > >This would imply that the internal clock phasing would be set relative to > >the rising edge of MCLR. > > > >This would also imply very small jitter even if MCLR is not synchronized to > >OSCin (or for an internal osc) -- not more than 1 cycle of the clock! > > > >Bob Ammerman > >RAm Systems > > > >-- > >http://www.piclist.com#nomail Going offline? Don't AutoReply us! > >email listserv@mitvma.mit.edu with SET PICList DIGEST in the body > > > > > > > > > > > > -- > http://www.piclist.com#nomail Going offline? Don't AutoReply us! > email listserv@mitvma.mit.edu with SET PICList DIGEST in the body > > -- http://www.piclist.com hint: To leave the PICList mailto:piclist-unsubscribe-request@mitvma.mit.edu