> 1) If I use intrc can I still use the UART ??? This is strictly a matter of timing tolerance between the two devices on the line. The receiver looks for the leading edge of the start bit, then times the other bits relative to that. At 8 data bits, the center of the last bit is 8 1/2 bits from the leading edge of the start bit. The absolute maximum tolerable error is therefore 5.88%, which causes the last data bit to be sampled at its edge instead of the middle. Most receivers sync everything to a 16x baud clock, so there is an additional small uncertainty in measuring the leading edge of the stop bit. Of course, you don't want to be near the guaranteed to fail limit anyway. I like to see no more than about 1/4 bit time error by the last bit, or about 3% clock mismatch betwen receiver and transmitter. Keep in mind that this is the combined error between receiver and transmitter. If you know the other end is right on (like a PC, for example), then you can get away with 3% mismatch in the PIC. If you've got two PICs with uncertain oscillators, then they each need to be within 1.5%. ******************************************************************** Olin Lathrop, embedded systems consultant in Littleton Massachusetts (978) 742-9014, olin@embedinc.com, http://www.embedinc.com -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads