> Well, yeah, but the PWM would really need to be synced to the AC waveform,
> which would be a PITA.

Not if the PWM frequency was much higher than the line frequency.  If so,
you could just ignore line sync and output asynchronous PWM which will
average nicely each 1/2 line cycle.  1.2KHz would be 10 PWM periods in each
1/2 line cycle, which should be good enough.  The FET transition time should
still be a negligeable percentage at that frequency if driven right.  Note
that the lowest hardware PWM frequency a 20MHz 16xxx PIC can produce is
1.22KHz.  Frankly I like this much better than low pass filtering the gate
to turn on the FETs slowly.  I guess it can be OK if done just right, but it
I don't like the power those FETs are dissipating even for a short time.


********************************************************************
Olin Lathrop, embedded systems consultant in Littleton Massachusetts
(978) 742-9014, olin@embedinc.com, http://www.embedinc.com

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