At 12:47 PM 2/11/02 -0600, Gordon Varney wrote:
>I have never seen this technique before. I first thought of thermal
>relief. Then I noticed the large copper areas just
>to the right. I use Microstripping techniques all the time and I have
>never read about this type of Striplining. It
>could be shielding or absorption concepts. My guess would be capacitive
>elements and series inductance in a run to
>reduce the coupling of EMI/RFI type interference.

I was thinking on this some more..

It looks like the Z-bends are the best way to get around other things, and
keep the trace inductance minimized.
Apparently, they couldn't route the whole herd around the corners, so they
made more or less a summing junction, then took off from there, with the
max number of traces that they could fit around the bends, then re-summed,
and carried on with whatever number of tracks would fit in the new space.

Looks to me that this trace is VERY sensitive to inductance, and I would
seriously look at the design to see if this is really necessary!  Usually,
when you get pushed this hard, you're doing something wrong.

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